main.rs

// from crates.io
extern crate mmap;
extern crate libc;

mod fpga_awg;

fn main() {
	let mut awg = fpga_awg::fpgaAwg::new();
	let mut params: fpga_awg::awgParam = fpga_awg::awgParam::default();
	let mut data: [i32; fpga_awg::n] = [0; fpga_awg::n];

	awg.syntesize_signal(1.0, 1000.0, &mut data, &mut params);
	awg.write_data_fpga(0, &mut data, &mut params);
}