richardeoin

use core::cmp;
use core::ptr;
use core::{mem, mem::MaybeUninit};

extern crate alloc;
use alloc::alloc::Layout;

use core::sync::atomic::{AtomicBool, AtomicUsize, Ordering};
use hashbrown::HashMap;

richardeoin

use stm32h7xx_hal::nb::block;

use hal::blocking::delay::{DelayMs, DelayUs};
use hal::timer::CountDown;
use stm32h7xx_hal::hal;

use stm32h7xx_hal::prelude::*;
use stm32h7xx_hal::time::Hertz;

/// Timer as a delay provider

richardeoin

/// Enables ITM
///
/// If swo_enable is true, then the SWO output pin will be enabled
fn low_level_itm(dbgmcu: &stm32::DBGMCU, swo_enable: bool) {
    // ARMv7-M DEMCR: Set TRCENA. Enables DWT and ITM units
    unsafe { *(0xE000_EDFC as *mut u32) |= 1 << 24 };

    // Ensure debug blocks are clocked before interacting with them
    dbgmcu.cr.modify(|_, w| {
        w.d1dbgcken()

richardeoin

#[macro_use]
extern crate log;
extern crate env_logger;
extern crate getopts;
extern crate smoltcp;

mod utils;

use smoltcp::iface::{EthernetInterfaceBuilder, NeighborCache};
use smoltcp::phy::wait as phy_wait;