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// Determine supported x86 CPU instruction set extensions |
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// |
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// For x86, x86_64 CPUs on WINDOWS ONLY |
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#include <iostream> |
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#include <vector> |
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#include <bitset> |
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#include <array> |
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#include <string> |
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#include <cstring> |
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#include <intrin.h> |
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class InstructionSet |
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{ |
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// forward declarations |
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class InstructionSet_Internal; |
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public: |
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// getters |
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static std::string Vendor(void) { return CPU_Rep.vendor_; } |
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static std::string Brand(void) { return CPU_Rep.brand_; } |
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static bool SSE3(void) { return CPU_Rep.f_1_ECX_[0]; } |
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static bool PCLMULQDQ(void) { return CPU_Rep.f_1_ECX_[1]; } |
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static bool MONITOR(void) { return CPU_Rep.f_1_ECX_[3]; } |
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static bool SSSE3(void) { return CPU_Rep.f_1_ECX_[9]; } |
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static bool FMA(void) { return CPU_Rep.f_1_ECX_[12]; } |
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static bool CMPXCHG16B(void) { return CPU_Rep.f_1_ECX_[13]; } |
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static bool SSE41(void) { return CPU_Rep.f_1_ECX_[19]; } |
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static bool SSE42(void) { return CPU_Rep.f_1_ECX_[20]; } |
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static bool MOVBE(void) { return CPU_Rep.f_1_ECX_[22]; } |
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static bool POPCNT(void) { return CPU_Rep.f_1_ECX_[23]; } |
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static bool AES(void) { return CPU_Rep.f_1_ECX_[25]; } |
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static bool XSAVE(void) { return CPU_Rep.f_1_ECX_[26]; } |
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static bool OSXSAVE(void) { return CPU_Rep.f_1_ECX_[27]; } |
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static bool AVX(void) { return CPU_Rep.f_1_ECX_[28]; } |
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static bool F16C(void) { return CPU_Rep.f_1_ECX_[29]; } |
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static bool RDRAND(void) { return CPU_Rep.f_1_ECX_[30]; } |
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static bool MSR(void) { return CPU_Rep.f_1_EDX_[5]; } |
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static bool CX8(void) { return CPU_Rep.f_1_EDX_[8]; } |
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static bool SEP(void) { return CPU_Rep.f_1_EDX_[11]; } |
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static bool CMOV(void) { return CPU_Rep.f_1_EDX_[15]; } |
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static bool CLFSH(void) { return CPU_Rep.f_1_EDX_[19]; } |
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static bool MMX(void) { return CPU_Rep.f_1_EDX_[23]; } |
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static bool FXSR(void) { return CPU_Rep.f_1_EDX_[24]; } |
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static bool SSE(void) { return CPU_Rep.f_1_EDX_[25]; } |
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static bool SSE2(void) { return CPU_Rep.f_1_EDX_[26]; } |
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static bool FSGSBASE(void) { return CPU_Rep.f_7_EBX_[0]; } |
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static bool BMI1(void) { return CPU_Rep.f_7_EBX_[3]; } |
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static bool HLE(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_7_EBX_[4]; } |
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static bool AVX2(void) { return CPU_Rep.f_7_EBX_[5]; } |
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static bool BMI2(void) { return CPU_Rep.f_7_EBX_[8]; } |
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static bool ERMS(void) { return CPU_Rep.f_7_EBX_[9]; } |
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static bool INVPCID(void) { return CPU_Rep.f_7_EBX_[10]; } |
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static bool RTM(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_7_EBX_[11]; } |
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static bool AVX512F(void) { return CPU_Rep.f_7_EBX_[16]; } |
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static bool RDSEED(void) { return CPU_Rep.f_7_EBX_[18]; } |
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static bool ADX(void) { return CPU_Rep.f_7_EBX_[19]; } |
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static bool AVX512VL(void) { return CPU_Rep.f_7_EBX_[31]; } |
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static bool AVX512PF(void) { return CPU_Rep.f_7_EBX_[26]; } |
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static bool AVX512ER(void) { return CPU_Rep.f_7_EBX_[27]; } |
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static bool AVX512DQ(void) { return CPU_Rep.f_7_EBX_[17]; } |
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static bool AVX512CD(void) { return CPU_Rep.f_7_EBX_[28]; } |
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static bool AVX512BW(void) { return CPU_Rep.f_7_EBX_[30]; } |
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static bool SHA(void) { return CPU_Rep.f_7_EBX_[29]; } |
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static bool PREFETCHWT1(void) { return CPU_Rep.f_7_ECX_[0]; } |
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static bool LAHF(void) { return CPU_Rep.f_81_ECX_[0]; } |
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static bool LZCNT(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_ECX_[5]; } |
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static bool ABM(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[5]; } |
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static bool SSE4a(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[6]; } |
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static bool XOP(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[11]; } |
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static bool TBM(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[21]; } |
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static bool SYSCALL(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_EDX_[11]; } |
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static bool MMXEXT(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[22]; } |
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static bool RDTSCP(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_EDX_[27]; } |
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static bool _3DNOWEXT(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[30]; } |
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static bool _3DNOW(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[31]; } |
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static bool isIntel(void) { return CPU_Rep.isIntel_; } |
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static bool isAMD(void) { return CPU_Rep.isAMD_; } |
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private: |
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static const InstructionSet_Internal CPU_Rep; |
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class InstructionSet_Internal |
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{ |
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public: |
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InstructionSet_Internal() |
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: nIds_{ 0 }, |
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nExIds_{ 0 }, |
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isIntel_{ false }, |
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isAMD_{ false }, |
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f_1_ECX_{ 0 }, |
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f_1_EDX_{ 0 }, |
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f_7_EBX_{ 0 }, |
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f_7_ECX_{ 0 }, |
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f_81_ECX_{ 0 }, |
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f_81_EDX_{ 0 }, |
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data_{}, |
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extdata_{} |
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{ |
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//int cpuInfo[4] = {-1}; |
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// Calling __cpuid with 0x0 as the function_id argument |
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// gets the number of the highest valid function ID. |
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std::array<int, 4> cpui; |
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__cpuid(cpui.data(), 0); |
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nIds_ = cpui[0]; |
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for (int i = 0; i <= nIds_; ++i) |
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{ |
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__cpuidex(cpui.data(), i, 0); |
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data_.push_back(cpui); |
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} |
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// Capture vendor string |
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char vendor[0x20]; |
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memset(vendor, 0, sizeof(vendor)); |
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*reinterpret_cast<int*>(vendor) = data_[0][1]; |
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*reinterpret_cast<int*>(vendor + 4) = data_[0][3]; |
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*reinterpret_cast<int*>(vendor + 8) = data_[0][2]; |
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vendor_ = vendor; |
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if (vendor_ == "GenuineIntel") |
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{ |
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isIntel_ = true; |
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} |
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else if (vendor_ == "AuthenticAMD") |
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{ |
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isAMD_ = true; |
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} |
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// load bitset with flags for function 0x00000001 |
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if (nIds_ >= 1) |
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{ |
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f_1_ECX_ = data_[1][2]; |
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f_1_EDX_ = data_[1][3]; |
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} |
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// load bitset with flags for function 0x00000007 |
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if (nIds_ >= 7) |
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{ |
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f_7_EBX_ = data_[7][1]; |
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f_7_ECX_ = data_[7][2]; |
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} |
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// Calling __cpuid with 0x80000000 as the function_id argument |
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// gets the number of the highest valid extended ID. |
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__cpuid(cpui.data(), 0x80000000); |
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nExIds_ = cpui[0]; |
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char brand[0x40]; |
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memset(brand, 0, sizeof(brand)); |
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for (int i = 0x80000000; i <= nExIds_; ++i) |
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{ |
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__cpuidex(cpui.data(), i, 0); |
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extdata_.push_back(cpui); |
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} |
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// load bitset with flags for function 0x80000001 |
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if (nExIds_ >= 0x80000001) |
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{ |
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f_81_ECX_ = extdata_[1][2]; |
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f_81_EDX_ = extdata_[1][3]; |
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} |
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// Interpret CPU brand string if reported |
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if (nExIds_ >= 0x80000004) |
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{ |
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memcpy(brand, extdata_[2].data(), sizeof(cpui)); |
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memcpy(brand + 16, extdata_[3].data(), sizeof(cpui)); |
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memcpy(brand + 32, extdata_[4].data(), sizeof(cpui)); |
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brand_ = brand; |
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} |
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}; |
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int nIds_; |
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int nExIds_; |
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std::string vendor_; |
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std::string brand_; |
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bool isIntel_; |
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bool isAMD_; |
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std::bitset<32> f_1_ECX_; |
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std::bitset<32> f_1_EDX_; |
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std::bitset<32> f_7_EBX_; |
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std::bitset<32> f_7_ECX_; |
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std::bitset<32> f_81_ECX_; |
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std::bitset<32> f_81_EDX_; |
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std::vector<std::array<int, 4>> data_; |
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std::vector<std::array<int, 4>> extdata_; |
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}; |
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}; |
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// Initialize static member data |
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const InstructionSet::InstructionSet_Internal InstructionSet::CPU_Rep; |
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// Print out supported instruction set extensions |
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int main() |
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{ |
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auto& outstream = std::cout; |
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auto support_message = [&outstream](std::string isa_feature, bool is_supported) { |
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outstream << isa_feature << (is_supported ? " supported" : " not supported") << std::endl; |
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}; |
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std::cout << InstructionSet::Vendor() << std::endl; |
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std::cout << InstructionSet::Brand() << std::endl; |
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support_message("3DNOW", InstructionSet::_3DNOW()); |
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support_message("3DNOWEXT", InstructionSet::_3DNOWEXT()); |
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support_message("ABM", InstructionSet::ABM()); |
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support_message("ADX", InstructionSet::ADX()); |
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support_message("AES", InstructionSet::AES()); |
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support_message("AVX", InstructionSet::AVX()); |
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support_message("AVX2", InstructionSet::AVX2()); |
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support_message("AVX512CD", InstructionSet::AVX512CD()); |
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support_message("AVX512ER", InstructionSet::AVX512ER()); |
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support_message("AVX512F", InstructionSet::AVX512F()); |
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support_message("AVX512PF", InstructionSet::AVX512PF()); |
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support_message("BMI1", InstructionSet::BMI1()); |
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support_message("BMI2", InstructionSet::BMI2()); |
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support_message("CLFSH", InstructionSet::CLFSH()); |
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support_message("CMPXCHG16B", InstructionSet::CMPXCHG16B()); |
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support_message("CX8", InstructionSet::CX8()); |
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support_message("ERMS", InstructionSet::ERMS()); |
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support_message("F16C", InstructionSet::F16C()); |
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support_message("FMA", InstructionSet::FMA()); |
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support_message("FSGSBASE", InstructionSet::FSGSBASE()); |
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support_message("FXSR", InstructionSet::FXSR()); |
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support_message("HLE", InstructionSet::HLE()); |
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support_message("INVPCID", InstructionSet::INVPCID()); |
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support_message("LAHF", InstructionSet::LAHF()); |
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support_message("LZCNT", InstructionSet::LZCNT()); |
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support_message("MMX", InstructionSet::MMX()); |
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support_message("MMXEXT", InstructionSet::MMXEXT()); |
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support_message("MONITOR", InstructionSet::MONITOR()); |
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support_message("MOVBE", InstructionSet::MOVBE()); |
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support_message("MSR", InstructionSet::MSR()); |
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support_message("OSXSAVE", InstructionSet::OSXSAVE()); |
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support_message("PCLMULQDQ", InstructionSet::PCLMULQDQ()); |
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support_message("POPCNT", InstructionSet::POPCNT()); |
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support_message("PREFETCHWT1", InstructionSet::PREFETCHWT1()); |
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support_message("RDRAND", InstructionSet::RDRAND()); |
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support_message("RDSEED", InstructionSet::RDSEED()); |
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support_message("RDTSCP", InstructionSet::RDTSCP()); |
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support_message("RTM", InstructionSet::RTM()); |
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support_message("SEP", InstructionSet::SEP()); |
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support_message("SHA", InstructionSet::SHA()); |
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support_message("SSE", InstructionSet::SSE()); |
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support_message("SSE2", InstructionSet::SSE2()); |
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support_message("SSE3", InstructionSet::SSE3()); |
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support_message("SSE4.1", InstructionSet::SSE41()); |
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support_message("SSE4.2", InstructionSet::SSE42()); |
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support_message("SSE4a", InstructionSet::SSE4a()); |
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support_message("SSSE3", InstructionSet::SSSE3()); |
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support_message("SYSCALL", InstructionSet::SYSCALL()); |
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support_message("TBM", InstructionSet::TBM()); |
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support_message("XOP", InstructionSet::XOP()); |
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support_message("XSAVE", InstructionSet::XSAVE()); |
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std::cout << "\n"; |
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// v2: has all of: cx16 lahf_lm popcnt sse4_1 sse4_2 ssse3 |
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// note: cx16 == cmpxchg16b, lahf_lm == lahf |
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if(InstructionSet::CMPXCHG16B() && InstructionSet::LAHF() && InstructionSet::POPCNT() && |
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InstructionSet::SSE41() && InstructionSet::SSE42() && InstructionSet::SSSE3()) |
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std::cout << "x86_64v2 supported\n"; |
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// v3: has all of: avx avx2 bmi1 bmi2 f16c fma abm movbe xsave |
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// note: for Intel, lzcnt is designated for abm |
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if(InstructionSet::AVX() && InstructionSet::AVX2() && InstructionSet::BMI1() && |
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InstructionSet::BMI2() && InstructionSet::F16C() && InstructionSet::FMA() && |
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InstructionSet::MOVBE() && InstructionSet::XSAVE() && |
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((InstructionSet::isAMD() && InstructionSet::ABM()) || (InstructionSet::isIntel() && InstructionSet::LZCNT()))) |
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std::cout << "x86_64v3 supported\n"; |
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// v4: has all of: avx512f avx512bw avx512cd avx512dq avx512vl |
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if(InstructionSet::AVX512F() && InstructionSet::AVX512CD() && InstructionSet::AVX512BW() && |
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InstructionSet::AVX512DQ() && InstructionSet::AVX512VL()) |
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std::cout << "x86_64v4 supported\n"; |
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return 0; |
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} |